Port Mapping - Developer Resources

IO pins¶

Any of the 38 IO pins can be a digital input or digital output:

SNAPpy IO	ATmega128RFA1
0	PB0 PCINT0
1	PB1 PCINT1
2	PB2 PCINT2
3	PB3 PCINT3
4	PB4 PCINT4 OC2
5	PB5 PCINT5 OC1A
6	PB6 PCINT6 OC1B
7	PB7 PCINT7 OC1C OC0A
8	PD0 INT0
9	PD1 INT1
10	PD2 INT2 RXD1
11	PD3 INT3 TXD1
12	PD4 CTS1 ICP1
13	PD5
14	PD6
15	PD7
16	PE0 RXD0 PCINT8
17	PE1 TXD0
18	PE2 AIN0 SPI MISO
19	PE3 OC3A AIN1
20	PE4 INT4 OC3B CTS0
21	PE5 INT5 OC3C RTS0
22	PE6 INT6
23	PE7 INT7 ICP3 RTS1
24	PF0 ADC0
25	PF1 ADC1 or SPI MOSI
26	PF2 ADC2 or SPI SCLK
27	PF3 ADC3
28	PF4 ADC4 or JTAG Test Clock
29	PF5 ADC5 or JTAG Test Mode Select
30	PF6 ADC6 I²C SDA or JTAG Test Data Out
31	PF7 ADC7 I²C SCL or JTAG Test Data In
32	PG0
33	PG1
34	PG2
35	PG3
36	PG4
37	PG5 OC0B

Wakeup Pins¶

Seventeen of the 38 IO pins support a hardware “wakeup” capability:

SNAPpy IO	ATmega128RFA1
0	PCINT0
1	PCINT1
2	PCINT2
3	PCINT3
4	PCINT4
5	PCINT5
6	PCINT6
7	PCINT7
8	INT0
9	INT1
10	INT2
11	INT3
16	PCINT8
20	INT4
21	INT5
22	INT6
23	INT7

Note

Setting the unit to wake from an edge-triggered interrupt on INT4-INT7 ( SNAPpy IO 20-23) will work, but it will result in higher power consumption during sleep. If you must have an edge-triggered wake signal, it is recommended you use a different pin.

Analog Input¶

Eight of the 38 IO pins can be used as ADC inputs:

SNAPpy IO	ATmega128RFA1
24	PF0
25	PF1
26	PF2
27	PF3
28	PF4
29	PF5
30	PF6
31	PF7

Serial Port 0¶

Four of the IO pins can optionally function as UART0:

SNAPpy IO	ATmega128RFA1
16	RXD0
17	TXD0
20	CTS0
21	RTS0

If you do not need RTS/CTS signals, then IO 20 and 21 are available for other usage.

Serial Port 1¶

Four of the IO pins can optionally function as UART1:

SNAPpy IO	ATmega128RFA1
10	RXD1
11	TXD1
12	CTS1
23	RTS1

If you do not need RTS/CTS signals, then IO 12 and 23 are available for other usage.

Pulse Width Modulation¶

Eight of the IO pins can optionally be used as Pulse Width Modulation (PWM) outputs:

SNAPpy IO	ATmega128RFA1
4	OC2
5	OC1A
6	OC1B
7	OC1C & OC0A
19	OC3A
20	OC3B
21	OC3C
37	OC0B

SPI¶

Three of the IO pins can optionally function as a SPI bus:

SNAPpy IO	ATmega128RFA1
26	SCLK
25	MOSI
18	MISO

These are not the hardware SPI pins. SNAPpy SPI is done via software emulation.

You will also need one “SPI Chip Select” pin per external SPI device. Any available IO pin can be used for this purpose.

Warning

These pin locations are correct for the chip build of the firmware. For RF2xx or SM2xx builds, the locations are different.

I²C¶

Two of the IO pins can optionally function as an I²C bus:

SNAPpy IO	ATmega128RFA1
31	SCL
30	SDA

These are not the hardware I²C pins. SNAPpy I²C is done via software emulation.